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April 2
nd & 3rd, 2009
Omni SouthPark Hotel, Austin TX                 

If you attended the conference, PLEASE take just ONE MINUTE to fill out our small survey to help make this event next year even better!

CLICK HERE for the 2009 survey!

If the presenter gives approval, presentations will be posted on this page (BELOW) before May 1st. Some are already available (see below).

April 3rd, 2009

8:00 - 8:30 On site Registration (coffee provided)
8:30 - 8:40 Welcomes and introductions
8:40 - 9:10 Key Note Address Janusz Rajski (Mentor Graphics)

Session 1 
9:10 - 9:50 - Presentation 1  - Grady Giles (AMD)
                 
Title Pros and Cons of Logic BIST
9:50 - 10:30 - Presentation 2  - Mohammad Tehranipoor (U of Connecticut)
                 
Title Test and Diagnostics for Timing and Power Related Failures
10:30 - 11:10  B R E A K
11:10 12:10 Sponsor Presentations  - (20 min each)
                  
Title Synopsys, Mentor Graphics, WinterLogic
12:10 - 1:30 LUNCH - Free lunch
Session 2  

1:30 2:10 - Presentation 4  Chris Hawkins (ARM)
                 
Title Practical examples using a DFT tester for test chip
2:10 2:50 - Presentation 5  - Colin Renfrew (Freescale)
                  
Title Enhancing At-Speed ATPG Using Information from STA
2:50 - 3:30 - Presentation 6  - Stephen Lau (Texas Instruments)
                 
Title IEEE 1149. 7 Overview

3:30 - 4:10  B R E A K

Session 3         

4:10 4:50 - Presentation 7  - Rohit Kapur (Synopsys)
                  
Title What can ATPG do for Switching Activity Reduction?
4:50 5:30 - Presentation 8 Sumit Dasgupta  (SI2)
                 
Title Semiconductor Business Review and Outlook: View from Deep Inside the Trenches
5:30 - 6:30 - Panel Discussion                       Referee: Jim Johnson

5:30  - 6:30 Happy Hour during Panel

Vendor Booths open from 8:30am - 6pm


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